Why TSMC grew four times faster than its foundry rivals in 2025 — price hikes, vertical integration, and commanding technology lead pay dividends
A 36% versus 8% growth split comes down to three advantages competitors can’t quickly replicate.
Counterpoint Research's full-year Foundry Market Supply Tracker estimated that the global semiconductor foundry market generated a record $320 billion in revenue in 2025, growing 16% year-over-year. TSMC accounted for 38% of that total and grew 36% year-over-year. In comparison, non-TSMC foundries collectively grew 8%.
That lopsided split isn’t a one-quarter anomaly or a function of a single product cycle, but instead reflects three massive advantages held by TSMC that reinforced each other throughout the year: an unmatched concentration of leading-edge node volume, compounding wafer price increases, and vertical integration into the advanced packaging that AI chips require.
TSMC's leading-edge node concentration
TSMC's own earnings data show how heavily its revenue has tilted toward the nodes that AI and high-performance computing demand. Advanced process technologies at 7nm and below accounted for 74% of TSMC's wafer revenue in Q4 2025, with 3nm alone contributing 24% and 5nm responsible for 36%. For the full year, 3nm's share rose from 18% in 2024 to 24%, while 5nm held steady at 36%, rising by just 2%. These are the process nodes at the foundation of Nvidia's Blackwell GPUs, AMD's Zen 5 EPYC processors, and Apple's M-series chips.
No other foundry has competitive volume at equivalent nodes. Samsung, the second-largest pure-play foundry, saw its market share dip to 7.7% in Q1 2025, down from 8.1% the prior quarter. Samsung's 3nm yields sat in the 30% to 40% range for much of the year, according to TrendForce, a level insufficient to attract large external orders. The company couldn’t even use its own 3nm Exynos 2500 for the Galaxy S25 series and instead sourced Qualcomm's Snapdragon 8 Elite from TSMC. Samsung disclosed 2nm GAA performance figures in its Q3 2025 earnings report and listed its first 2nm product, the Exynos 2600, as in mass production by December, but yields remained a work in progress, remaining below 50% as of last month.
Counterpoint Research Director Tom Kang acknowledged Samsung's difficulties but pointed to a potential turning point. "Demand for its 4nm node has been relatively solid, supporting better pricing, and the ramp of 2nm should help it secure higher-value designs, particularly in AI and mobile," Kang said.
SMIC, the largest Chinese foundry, grew 16% YoY and Nexchip expanded 24%, but both companies' growth came from trailing-edge and mature nodes supported by domestic localization efforts, not from competing at 5nm and below. SMIC operates roughly 20,000 wafers per month of 7nm capacity, most of which reportedly goes to Huawei. GlobalFoundries, UMC, and VIS similarly serve mature-node markets.
Compounding wafer price increases
TSMC's revenue growth isn’t solely a function of shipping more wafers; rising average selling prices (ASPs) have compounded the volume gains. TSMC's wafer ASPs increased at a roughly 15.9% annual rate from 2019 through 2025. Gross profit per wafer expanded approximately 3.3 times over the course of 2025 alone, as price increases outpaced production cost growth. Cost of goods sold rose 78% over the same multi-year period, while ASPs more than doubled.
TSMC is understood to have locked in further increases for 2026. TrendForce reported in November that the company notified customers of 5% to 10% price hikes across all sub-5nm nodes starting in January 2026, covering 2nm, 3nm, 4nm, and 5nm processes, and cumulative increases on 3nm-family nodes are expected to reach double digits over the next several years.
TSMC can sustain these increases because customers have no alternative at comparable volume and yield. Samsung's sub-5nm yields are not competitive enough to absorb large orders. Intel Foundry, which held 6% of the broader Foundry 2.0 market by Counterpoint's reckoning, generated $4.5 billion in Q4 2025 revenue but remained deeply unprofitable, with 18A process yields only set to reach industry standard levels in 2027. Until a second foundry can offer competitive, leading-edge manufacturing at scale, TSMC retains pricing power that directly translates volume growth into outsized revenue growth.
Advanced packaging
Another factor to consider is TSMC's expansion into advanced packaging, which has created a second revenue stream that competitors can only partially capture at this time. TSMC's CoWoS capacity roughly doubled from approximately 35,000 wafers per month in late 2024 to roughly 80,000 by the end of 2025. The company is targeting further increases to around 130,000 wafers per month by the end of this year through new facilities at AP7 in Chiayi and AP8 in Tainan.
Nvidia reportedly secured more than 60% of TSMC's total CoWoS capacity for 2025 and 2026, with every Blackwell GPU and the upcoming Rubin architecture requiring CoWoS-L packaging to connect multiple GPU dies with HBM3e memory stacks. When a customer commits to TSMC for both front-end wafer fabrication and back-end advanced packaging, switching costs become very high, so TSMC is capturing revenue at both stages.
Meanwhile, the OSAT segment grew 10% YoY in 2025 under Counterpoint's Foundry 2.0 framework, with ASE/SPIL and Amkor absorbing spillover demand. ASE became the second-largest player by revenue in the entire Foundry 2.0 market behind TSMC, according to Counterpoint. But OSAT vendors primarily handle the overflow that TSMC's internal capacity cannot accommodate, not the highest-value packaging steps. TSMC keeps the silicon interposer fabrication and front-end chip-on-wafer processes in-house, outsourcing lower-margin substrate assembly and testing.
"Advanced packaging is no longer just a supporting step but becoming a gating factor for AI deployment," William Li, senior analyst at Counterpoint Research, said. "As customers move to lock in capacity, OSAT vendors are structurally better positioned than in past cycles, with growth visibility extending over multiple years."
Counterpoint projects that industry-wide advanced packaging capacity could expand by roughly 80% YoY in 2026. TSMC's own CoWoS expansion accounts for the majority of that growth, once again reinforcing its position at the center of the AI chip supply chain.
That position isn’t guaranteed to last forever, though. Samsung’s 2nm ramp could begin attracting external customers if yields stabilize, and Intel's 18A process has its first products in Panther Lake and Clearwater Forest, though volume shipments still have time to slip. Chinese foundries will likely sustain double-digit growth on continued localization spending, while non-memory IDMs such as Texas Instruments and Infineon have largely cleared their inventory corrections, providing a more stable demand baseline.
None of these developments, however, close the gap in the near term as TSMC enters 2026 with 2nm production ramping, some $56 billion in planned capex, and a customer base that’s pre-committed to years of advanced packaging capacity. The fact that TSMC took 38% of the market in 2025 wasn’t an outlier but the product of compounding advantages in technology, pricing, and vertical integration that will take competitors years to match.
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Luke James is a freelance writer and journalist. Although his background is in legal, he has a personal interest in all things tech, especially hardware and microelectronics, and anything regulatory.