Intel reveals 288-core Clearwater Forest Xeon at Hot Chips — 18A process' first outing promises big efficiency and performance gains

(Image credit: Shutterstock)

Intel pulled the wraps off its first all-E-core Xeon at Hot Chips on Monday, August 25, in Cupertino, California. Dubbed Clearwater Forest, it's the first Xeon built on the company’s next-gen 18A process.

Scheduled to ship in 2026, the processor packs a punch with 288 efficiency cores and a two-socket ceiling of 576 cores, as well as over 1,152 MB combined last-level cache. On paper, it’s Intel’s next attempt to close the performance-per-watt gap in the data center, and it’s a shot across the bow at AMD’s EPYC line.

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Intel Clearwater forest — (Image credit: Intel)

Darkmont cores bring modest IPC gains, massive scale

Architecturally, Clearwater is a spiritual sequel to Intel’s 144-core all-E-core Xeon, Sierra Forest, but with a few notable upgrades. The new Darkmont E-cores offer a wider 3x3 decode engine, deeper out-of-order windows, and enhanced execution ports, resulting in approximately 17% better IPC than the Crestmont generation.

Four cores share 4MB of L2 cache, and the chip doubles L2 bandwidth compared to the Sierra. Multiply that across 288 cores, and you’ve got a throughput monster designed to eat multithreaded web services and AI inference jobs alive.

The choice of process matters just as much as core count. Clearwater is one of the first real-world testbeds for Intel’s 18A node, which pairs RibbonFET transistors with backside power delivery.

This is effectively Intel’s answer to the density and power efficiency questions that have enabled TSMC and AMD to dominate in recent years. By separating power and signal routing, Intel claims higher cell utilization and lower IR drop, features that hyperscalers care about when power bills stretch into megawatts.

A new definition of Xeon?

Compared to AMD’s 128-core Bergamo, Clearwater plays an entirely different game. AMD cores support SMT, AVX-512-class vector units, and higher single-thread performance. In contrast, Intel’s cores don’t chase peak IPC; they chase scale. That means Clearwater might not top benchmarks in HPC or AI training, but in raw thread count and total throughput, Intel says it's well ahead. A two-socket Clearwater box can theoretically support over 1,000 vCPUs per rack, while Intel is claiming 3.5x better perf-per-watt versus its previous Xeons.

The bigger question is whether customers buy into Intel’s efficiency-first bet. For decades, Xeon has been synonymous with P-cores, but Clearwater is different. It’s a data center processor that doesn’t care about prestige benchmarks, but rather how many workloads it can cram into a rack without blowing the power budget. If Intel’s numbers hold, the firm expects Clearwater Forest to redefine what Xeon is supposed to be, rather than simply being a new iteration.

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Luke James is a freelance writer and journalist. Although his background is in legal, he has a personal interest in all things tech, especially hardware and microelectronics, and anything regulatory.

39 Comments Comment from the forums

A Stoner

Whole new role, same branding. Sounds like a totally winning combination. Kind of like replacing the Filet Mignon with chicken and calling it Filet Mignon. For the life of me, I cannot understand why Intel, the company that previously made every single CPU I purchased from 1995 through 2020 has been on a downward spiral. It is a total mystery, one that may never be solved. Anyways, I am enjoying my AMD 5950X3D computer. The first AMD I have purchased since early 1990s.
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Stomx

If all now use chiplets like Lego blocks what stops them to double, triple, quadruple number of cores into socket? What, TDP 500W is some magic number for them? NVIDIA for example does not care about any stop signs and is packing day and night their silicon in exchange for tons of gold already with 1.5 kW per socket.

Don't worry about exceeding power outlet 2kW limit. Teslas charge drain much more
Reply
kanewolf

A Stoner said:
Whole new role, same branding. Sounds like a totally winning combination. Kind of like replacing the Filet Mignon with chicken and calling it Filet Mignon. For the life of me, I cannot understand why Intel, the company that previously made every single CPU I purchased from 1995 through 2020 has been on a downward spiral. It is a total mystery, one that may never be solved. Anyways, I am enjoying my AMD 5950X3D computer. The first AMD I have purchased since early 1990s.
This is not targeted at you, unless you run a COLO or cloud platform. Not EVERY task requires P cores.
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bit_user

Okay, cool. But, will they sell me an 8-core version, for my next mini-PC?

I'm still sad they seem to have skipped a Crestmont-based successor to Alder Lake-N. Was hoping we'd get a similar sort of Meteor Lake-N.
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bit_user

kanewolf said:
Not EVERY task requires P cores.
Not to mention that the E-cores are closing in on P-core levels of performance. The Skymont cores in Arrow Lake are already very strong, and these Clearwater Forest CPUs will have Darkmont, which is purported to gain 17% IPC over Skymont!
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bit_user

Stomx said:
If all now use chiplets like Lego blocks what stops them to double, triple, quadruple number of cores into socket?
Socket size. For one thing, these slot into the same socket as the current Granite Rapids server CPUs. That limits physical size, power delivery, and memory channels.

Stomx said:
TDP 500W is some magic number for them? NVIDIA for example does not care about any stop signs
Nvidia's training GPUs are in a league of their own, since the cost of the hardware is so high, demand for compute is so high, and supply is relatively constrained. All of those factors push them towards targeting extremely high power consumption, in order to squeeze more performance per mm^2 of silicon they can ship.
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thestryker

It's going to be interesting to see how things like latency pan out. The L3 cache is 8MB per 4-core cluster and is contained within the base tile.

The whole design will also make it very interesting to see what the SKU stack looks like.

bit_user said:
17% IPC over Skymont
It's Crestmont, the fine print shows they're comparing to SRF.
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cp0x

I'm not sure how "it’s a shot across the bow at AMD’s EPYC line." First, it's a year later than AMD releasing a 288 hardware thread chip, and also a year later than AMD releasing a 320 hardware thread chip, and also a year later than AMD releasing a 384 hardware thread chip. In other words, it has nowhere near as many hardware threads as what AMD released a year ago in 2024.

I'm not complaining. I think it's great that Intel is using a new production process, and building efficient chips with lots of cores. I hope that they do great stuff.

I just think the article's association with reality is poor.
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wussupi83

I recently benchmarked both my 14700k and 12700k with and without e-cores enabled. I run a trading simulation program written in C#. It blew me away each e-core improved performance 3-3.5% in the most CPU intensive task. The results gave me a whole new respect for e-cores. I think a chip like this could be interesting.
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bit_user

cp0x said:
I'm not sure how "it’s a shot across the bow at AMD’s EPYC line."
I guess because it's a doubling of the core count Sierra Forest offered, and with substantially improved cores, as well?

cp0x said:
First, it's a year later than AMD releasing a 288 hardware thread chip,
The max Turin specs are 192-core/384-thread Zen 5C or 128-core/256-thread Zen 5.

Sierra Forest (144 cores) did compete rather well with Siena, the 128-core/256-thread Zen 4C EPYC. It's certainly possible Clearwater Forest will compete well with Turin. But, as you point out, AMD will be nearing the launch of their next gen, by the time Clearwater Forest ships.

cp0x said:
In other words, it has nowhere near as many hardware threads as what AMD released a year ago in 2024.
Yeah, but per-thread performance will favor Clearwater Forest. Per-core performance of Zen 5C is obviously better. It should be an interesting matchup. Intel could even edge a win, on integer-heavy scalar workloads. But, as with Sierra Forest, that would be a short-lived victory.
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