A leaker has said that AMD's upcoming Zen 6 CPU architecture will feature a bigger L3 cache, compared to Zen 5, to compensate for the architecture's supposed larger 12-core CCD design. Resident leaker HXL on X claims that Zen 6 will feature 48MB of L3 cache, keeping the L3 cache-to-core ratio the same as in previous generations.
HXL also claims that Zen 6 will feature a larger footprint for the die itself, likely due to the extra cores being added to each CCD. Zen 6 will allegedly sport a 76mm² die, which is 7% larger than Zen 5's 71mm² die. In fact, if this info is true, Zen 6 will be the first architecture to have a larger footprint than its predecessors since Zen 3.
One of the biggest changes we are seeing from Zen 6 leaks is the architecture's introduction of a 12-core CCD for the standard Zen 6 core dies (excluding Zen 6c). This is a massive change for Ryzen as a whole, and will enable 12-cores to share data with each other across a unified L3 cache. AMD hasn't confirmed the 12-core CCD, but it's been a consistent touchstone of rumors for nearly a year.
The last time we saw a change similar to this was Zen 3, when AMD unified its eight-core design to share a unified L3 cache. Zen 2 and previous generations also had an eight-core CCD, but each cluster of four cores was separated into two individual CCXs. Cores on one CCX that wanted to share data on another CCX were forced to run it through the CPU's Infinity Fabric.
However, Zen 6 is the first architecture we are seeing a full-blown core-count increase per CCD for the standard cores. AMD has officially confirmed that Zen 6 will be a complete redesign from the ground up with a focus on multi-threaded performance. AMD will also be using TSMC's N2 process for Zen 6, which alone will provide a 15% increase in transistor density and up to 15% more performance (at the same power) compared to prior TSMC nodes.
There have been no details yet on X3D models for Zen 6, but without a doubt, AMD will be making X3D versions of Zen 6 with the massive success it has had with all of its outgoing 3D-VCache-equipped processors. Having more baseline L3 cache will give future Zen 6 models even more L3 cache to play with once X3D models arrive.
Intel: guys please stop with all these advancements, we can't catch up!
Advancement=exactly the same just add 4 more cores...
Meanwhile intel has caught up with AMD in GPU tech with panther lake now beating AMDs equivalents.
My next upgrade will likely be in 2027. I'm not even sure what to look for anymore. Don't need more speed in games or apps. Something really cool and innovative though.
Advancement=exactly the same just add 4 more cores...
Meanwhile intel has caught up with AMD in GPU tech with panther lake now beating AMDs equivalents.
Except it's also a new arch and node, on top of 4 more cores to a single CCD.
Look at all the things this article didn't talk about.......
https://imgflip.com/s/meme/Look-At-All-These.jpg
You apparently didn't read said article, or you would have seen the embedded X post that is showing such information... :sarcastic:
Also this:
However, Zen 6 is the first architecture we are seeing a full-blown core-count increase per CCD for the standard cores. AMD has officially confirmed that Zen 6 will be a complete redesign from the ground up with a focus on multi-threaded performance. AMD will also be using TSMC's N2 process for Zen 6, which alone will provide a 15% increase in transistor density and up to 15% more performance (at the same power) compared to prior TSMC nodes.
