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WD Preps New Firmware to Restore WD Black SN850's Performance On AMD X570 Chipset

WD Black SN850
WD Black SN850 (Image credit: Western Digital)

The WD Black SN850 is easily one of the best SSDs that money can buy right now. But owners had been reporting a performance loss over 40% when installing the SSD in a M.2 slot that's connected to AMD's X570 chipset. Fear not however, Western Digital has identified the problem, and the company tells us a solution is en route.

According to the manufacturer's investigation, the SN850 suffers from a drop in write performance on some X570 motherboards when the maximum payload size (MPS) is configured for 128 bytes. The option basically dictates the maximum transaction layer packet (TLP) that goes through the PCIe controller. Obviously, a low value will cripple devices with higher MPS capability, since they're forced to operate at lower MPS settings.

For now, it's recommended that SN850 owners install their SSDs on a M.2 slot that's connected directly to the Ryzen processor. If all your M.2 slots are already occupied, you may just have to wait for Western Digital's new firmware, which eliminates the MPS restriction on the SN850.

Western Digital assures us that the new SN850 firmware will be available for download on or before July 12, 2021. The update process is fairly simple, since all you have to do is launch the Western Digital Dashboard software, and it'll prompt you for the update.

You can find Western Digital's full statement to us below.

Western Digital's statement: 

The WD_BLACK SN850 NVMe SSD can experience a decrease in write performance when connected to a chipset M.2 slot on certain motherboards, specifically when max payload size (MPS) is set to 128 bytes (128B). To resolve this issue, Western Digital will release a firmware update that eliminates a restriction in our product for this setting of MPS, expected to be available by July 12, 2021.

For optimum SSD performance, Western Digital recommends that customers download the latest BIOS version and drivers for their system and connect the WD_BLACK SN850 directly to the processor/CPU M.2 slot.

WD_BLACK SN850 customers can access/download the latest firmware via Western Digital Dashboard software. Once the firmware update is available, customers who open the Dashboard software will be prompted to make the update.

  • plateLunch
    So does anyone understand the PCIe bus enough to make sense of WD's explanation? Sounds incomplete. Who is setting the 128 byte MPS? Is the packet size negotiated and the SN850 wasn't doing that? Just curious.
    Reply
  • TallarnKadris
    plateLunch said:
    So does anyone understand the PCIe bus enough to make sense of WD's explanation? Sounds incomplete. Who is setting the 128 byte MPS? Is the packet size negotiated and the SN850 wasn't doing that? Just curious.



    I don't know enough to provide you with a technical explanation but i can tell you as someone who has recently purchased an X570 board..the GB aorus Master and found this problem pretty much straight away to tell you what the cause is

    the problem is to do with components on the board The lowest max payload speed on the bus will restrict everything else on the same bus to that speed. In my instance the WiFi adaptor's max payload speed is 128. which means the NVME controller on the board along with my capture card on the PCIE 4.0 16 x4 is also being restricted to 128 bytes
    Unfortunately the BIOS doesn't let you disable the WiFi adaptor so i had no way to resolve or at least alieviate the problem

    I ran into some people on another forum who had a similar issue and they didn't know what was going on, i explained that this was my issue and to check their max payload speed. the OP had a diofferent board, but the same problem which was traced to the titan thunderbolt port's max payload speed being 128 bytes. they were able to disable the port in the bios and the next component up was 256 bytes. they got a performance increase which showed that the max payload speed was indeed the culprit.
    Reply
  • SampsonJackson
    plateLunch said:
    So does anyone understand the PCIe bus enough to make sense of WD's explanation? Sounds incomplete. Who is setting the 128 byte MPS? Is the packet size negotiated and the SN850 wasn't doing that? Just curious.

    MPS, Maximum Payload Size, dictates the size of the individual data packets on PCIe (TLP; payload). Simply put, a larger payload size increases efficiency of the PCIe link because you can transmit more data per "chunk", and reduce link overhead (requests, acknowledgement, etc).

    Here is an excellent overview of MPS, and the relation with link efficiency (pdf warning!):

    https://www.xilinx.com/support/documentation/white_papers/wp350.pdf
    Thst said, the difference between MPS=256B vs. 128B is about 200-300MB/s, when the link is at 100% utilization. It makes no difference to throughput, from link point of view, until you approach link saturation.

    WD fixed it fast! Nice work!

    (Oops, didn't mean to reply to post!) :)
    Reply