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Upgrading And Repairing PCs 21st Edition: Processor Specifications

Upgrading And Repairing PCs 21st Edition: Processor Specifications
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Tom’s Hardware and QUE Publishing are teaming up once more to bring you four chapters from the latest edition of Scott Mueller’s Upgrading And Repairing PCs. And again, we’re giving ten lucky Tom's Hardware community members a copy of the book. Enter to win by completing this contest form.

Foreward From The Editor

When this assignment landed in my inbox, I craned around to see that, up on the bookshelf rests the 11th Edition of Upgrading And Repairing PCs - one of just a few dozen physical books that I actually still own.

Almost two years have passed since we featured the 20th Edition of Scott Mueller’s iconic book, and in the PC world, a lot can happen in two years. We’ve seen a bevy of new processor interfaces from Intel, APUs from AMD, the rise of UEFI, SSDs have gone mainstream, and for better or worse, Microsoft released Windows 8.

Since many PC builders only go through a major upgrade every few years, I decided to focus on parts of Upgrading And Repairing PCs (21st Edition) dealing with components that have undergone major changes recently. With this in mind, we chose excerpts from chapters three (Processor Types and Specifications), five (BIOS), 10 (Flash And Removable Storage), and 20 (PC Diagnostics, Testing, and Maintenance).

The first chapter we're making available covers everybody's favorite core component: the processor. But there's just too much CPU to cover in one day. So, we're publishing a section from the first part of Chapter 3, Processor Specifications. Next week, we'll follow up with Processor Features.

  • Chapter 3: Processor Specifications
  • Chapter 3: Processor Features
  • Chapter 5: BIOS
  • Chapter 10: Flash And Removable Storage
  • Chapter 20: PC Diagnostics, Testing, and Maintenance

Processor Specifications

Many confusing specifications often are quoted in discussions of processors. The following sections discuss some of these specifications, including the data bus, address bus, and speed. The next section includes a table that lists the specifications of virtually all PC processors.

Processors can be identified by two main parameters: how wide they are and how fast they are. The speed of a processor is a fairly simple concept. Speed is counted in megahertz (MHz) and gigahertz (GHz), which means millions and billions, respectively, of cycles per second—and faster is better! The width of a processor is a little more complicated to discuss because three main specifications in a processor are expressed in width:

  • Data (I/O) bus (also called FSB or front side bus)
  • Address bus

  • Internal registers

Note that the processor data bus is also called the front side bus (FSB), processor side bus (PSB), or just CPU bus. All these terms refer to the bus that is between the CPU and the main chipset component (North Bridge or Memory Controller Hub). Intel uses the FSB or PSB terminology, whereas AMD uses only FSB. I usually just like to say CPU bus in conversation or when speaking during my training semi- nars, because that is the least confusing of the terms while also being completely accurate.

The number of bits a processor is designated can be confusing. Most modern processors have 64-bit (or wider) data buses; however, that does not mean they are classified as 64-bit processors. Processors from the 386 through the Pentium 4 and Athlon XP are considered 32-bit processors because their internal registers are 32 bits wide, although their data I/O buses are 64 bits wide and their address buses are 36 bits wide (both wider than their predecessors, the Pentium and K6 processors). Processors since the Intel Core 2 series and the AMD Athlon 64 are considered 64-bit processors because their internal registers are 64 bits wide.

First, I present a table describing the different specifications used to describe PC processors; then the following sections will explain the specifications in more detail. Refer to this table as you read about the various processor specifications, and the information in the table will become clearer.

Processor
Intel Core i5 (Ivy Bridge)
AMD FX (Vishera)
Cores
4
8 / 6 / 4
Process
22 nm
32 nm
Clock
>2x
>2x
Voltage
1.4 V
0.825-1.475 V
Registers
64-bit
64-bit
Data Bus
64-bit
64-bit
Max. Memory
32 GB
1 TB
L1 Cache
>64 KB
32KB I/16K D per core
L2 Cache
256 KB per core
1 MB per core
L3 Cache
6 MB
8 MB (8 / 6-core)
4 MB (4-core)
L2/L3 Cache Speed
Core
Core
Multimedia Instructions
SSE4.2, AVX
SSE4.2, AVX, FMA4
Transistors
1.4 billion
1.2 billion
Introduced
April 2012
October 2012
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Top Comments
  • 11 Hide
    DelightfulDucklings , October 14, 2013 10:22 PM
    Very interesting article, I quite enjoyed the part about Cache memory
Other Comments
  • 5 Hide
    xkm1948 , October 14, 2013 9:13 PM
    Really nice intro article!
  • 11 Hide
    DelightfulDucklings , October 14, 2013 10:22 PM
    Very interesting article, I quite enjoyed the part about Cache memory
  • 2 Hide
    kindiana , October 14, 2013 10:27 PM
    nice article
  • 9 Hide
    burnley14 , October 14, 2013 10:29 PM
    One of the most interesting and informative articles I've ever read on the site. Great job!
  • 2 Hide
    aredflyingbird , October 14, 2013 10:41 PM
    Agreed, excellent article.
  • 2 Hide
    palladin9479 , October 14, 2013 10:55 PM
    Really good article, actually was spot on with how caching works.
  • 3 Hide
    AndrewJacksonZA , October 15, 2013 12:22 AM
    "Forward From The Editor"
    Shouldn't that be "Foreword?"
  • 3 Hide
    iam2thecrowe , October 15, 2013 2:23 AM
    I need more cache in my kitchen.
  • 0 Hide
    LalitMotagi , October 15, 2013 2:25 AM
    Great Article.
  • -1 Hide
    Rex Romero , October 15, 2013 2:30 AM
    Andrew. It's so advanced so it's forward. lol
  • 1 Hide
    groundrat , October 15, 2013 4:04 AM
    Excellent article.
  • 0 Hide
    ojas , October 15, 2013 5:22 AM
    Quote:
    For example, if you live on a street in which the address is limited to a two-digit (base 10) number, no more than 100 distinct addresses (00–99) can exist for that street (102). Add another digit, and the number of available addresses increases to 1,000 (000–999), or 103.

    Should be 10^2, 10^3, and in the next para, 2^x.
  • 0 Hide
    ojas , October 15, 2013 6:11 AM
    Quote:
    Note: Early versions of EM64T-equipped processors from Intel lacked support for the LAHF and SAHF instructions used in the AMD64 instruction set.

    This was very interesting, considering both instructions were supported even by the humble 8086.
  • 3 Hide
    spookyman , October 15, 2013 6:20 AM
    I have one still from 18 years ago. Still one of the best tech books I own. Though mine was just starting to touch the Intel Pentium processor. It even covered IBM's PS/2 computers and technology. Its amazing how much more hardware intensive PC's were back then they are now.
  • 0 Hide
    ojas , October 15, 2013 6:50 AM
    I ended up buying the 19th edition after last year's excerpts on Tom's Hardware, the 20th wasn't available in India then.

    These sections seem more or less unchanged, except for the mention of Ivy and Vishera, and i think the CPU-z screenshots are new as well.
  • 0 Hide
    AndrewJacksonZA , October 15, 2013 6:54 AM
    Quote:
    Quote:
    Note: Early versions of EM64T-equipped processors from Intel lacked support for the LAHF and SAHF instructions used in the AMD64 instruction set.

    This was very interesting, considering both instructions were supported even by the humble 8086.
    Apparently they were missing from the early 64bit CPUs from AMD and Intel. They appeared in March 2005 for AMD CPUs and June 2005 for Intel CPUs
    https://en.wikipedia.org/wiki/X86-64#Older_implementations

    Yet at the very least the 80386 supported them:
    http://css.csail.mit.edu/6.858/2011/readings/i386/LAHF.htm

    So it appears that it was an early-64 bit CPU issue only.
  • 0 Hide
    ta152h , October 15, 2013 9:04 AM
    I could only get to page three before being thoroughly disgusted by the lack of knowledge of the writer. How can he be writing books, without actually knowing the material?

    The Prescott introduced 64-bit to the Intel world, not the Core 2. Kind of common knowledge. The Athlon XP had a 36-bit address bus? I don't remember ever seeing that.

    Then we go to the misinformation about the 8086/8088 to 386.

    In actuality, there were four modes in the 80386. Real, Virtual 86, Protected 286, and Protected 386. Yup, four. And no, Windows 3.0 was not expected to run on an 8088 or 80286, because it DID use Virtual 86, which those processors could not support. You know, the part where they let you go from one DOS task to another. That was in the hardware. And that hardware started with the 80386.

    Moreover, the 80286 did NOT have the same instruction set as the 8086. Only in real mode did it. And why do you suppose it was called real mode? Maybe because the addresses were not virtualized? The 80286, as mentioned above, did have virtual addresses in what was called the 80286 Protected Mode. It not only ran Real Mode apps much faster, but when in Protected Mode was very capable of running multitasking Operating Systems, something that could not be done well on the 8086. It also increased the memory bus to 24-bits, albeit still using 64K bit segments.

    OS/2 1.x was the best example of an OS using 286 Protected mode, although any software using "Extended Memory" was taking advantage of the greater addressing of the 286, albeit in an inelegant way.

    I stopped reading after page three, as it's just discouraging to think people are writing books without being accurate. OK, so we have the author that got it wrong, fair enough, but what about the people who are supposed to error check it. I certainly don't know everything, and I know this stuff, and it's pretty basic. No one caught this? Are you kidding me? The 286 stuff might be a bit far away, but not knowing that x86-64 first appeared in the Prescott line is really difficult to understand, and is very basic. This is made more so because of all the rumors that the processor was made to support it, but Intel was hiding it so as to not undercut the Itanium. In time, it was proven true.

    Please, don't spread misinformation. Someone will repeat this stuff, and then someone else will, and it becomes 'fact' despite being wrong. If you publish a book, make a friggin effort! I'm sure I could errors the rest of the way, but it's just too annoying for me to wade through this rubbish.

    By the way, the term CPU bus is an ambiguous one. The CPU has multiple buses, and if you used that term with me, I'd wonder which one you were referring to. Find a more accurate term, like PCI-E bus if that's what you are trying to say.
  • -2 Hide
    ezorb , October 15, 2013 9:22 AM
    I feel that this is bellow the level of this website, even below the level of Maximum PC (which has a great podcast), this is the book my grandfather would buy if he wanted to try his hand at build a PC
  • -1 Hide
    hardrock40 , October 15, 2013 10:08 AM
    Really nice article well worth the read for sure.
  • -2 Hide
    ta152h , October 15, 2013 10:42 AM
    I could only get to page three before being thoroughly disgusted by the lack of knowledge of the writer. How can he be writing books, without actually knowing the material?

    The Prescott introduced 64-bit to the Intel world, not the Core 2. Kind of common knowledge. The Athlon XP had a 36-bit address bus? I don't remember ever seeing that.

    Then we go to the misinformation about the 8086/8088 to 386.

    In actuality, there were four modes in the 80386. Real, Virtual 86, Protected 286, and Protected 386. Yup, four. And no, Windows 3.0 was not expected to run on an 8088 or 80286, because it DID use Virtual 86, which those processors could not support. You know, the part where they let you go from one DOS task to another. That was in the hardware. And that hardware started with the 80386.

    Moreover, the 80286 did NOT have the same instruction set as the 8086. Only in real mode did it. And why do you suppose it was called real mode? Maybe because the addresses were not virtualized? The 80286, as mentioned above, did have virtual addresses in what was called the 80286 Protected Mode. It not only ran Real Mode apps much faster, but when in Protected Mode was very capable of running multitasking Operating Systems, something that could not be done well on the 8086. It also increased the memory bus to 24-bits, albeit still using 64K bit segments.

    OS/2 1.x was the best example of an OS using 286 Protected mode, although any software using "Extended Memory" was taking advantage of the greater addressing of the 286, albeit in an inelegant way.

    I stopped reading after page three, as it's just discouraging to think people are writing books without being accurate. OK, so we have the author that got it wrong, fair enough, but what about the people who are supposed to error check it. I certainly don't know everything, and I know this stuff, and it's pretty basic. No one caught this? Are you kidding me? The 286 stuff might be a bit far away, but not knowing that x86-64 first appeared in the Prescott line is really difficult to understand, and is very basic. This is made more so because of all the rumors that the processor was made to support it, but Intel was hiding it so as to not undercut the Itanium. In time, it was proven true.

    Please, don't spread misinformation. Someone will repeat this stuff, and then someone else will, and it becomes 'fact' despite being wrong. If you publish a book, make a friggin effort! I'm sure I could errors the rest of the way, but it's just too annoying for me to wade through this rubbish.

    By the way, the term CPU bus is an ambiguous one. The CPU has multiple buses, and if you used that term with me, I'd wonder which one you were referring to. Find a more accurate term, like PCI-E bus if that's what you are trying to say.
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