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TSMC's First 3nm ICs in Q1 2023, 3nm Extended Node Incoming

(Image credit: TSMC)

TSMC this week said that the first commercial batch of chips produced using its N3 (3 nm) fabrication process would ship to its customer in the first quarter of 2023. The company also indicated that it was working on 2nd generation 3nm-class node that will improve yields, increase performance, and cut down power consumption.

First 3nm Chips Due in Q1 2023

TSMC is on track to start high volume manufacturing (HVM) of semiconductors using its N3 node in the second half of 2022, just as expected. However, cycle times of modern nodes (even those that extensively rely on extreme ultraviolet lithography) tend to be extremely long (over 100 days), so the final customer will get its chips and pay TSMC sometime in Q1 2023. Previously many market observers (us included) believed that the company will ship its first 3nm chips in late 2022.

"N3 risk production is scheduled in 2021, and production will start in second half of 2022," said C.C. Wei, chief executive officer of TSMC, during the company's conference call with analysts and investors. "So second half of 2022 will be our mass production, but you can expect that revenue will be seen in first quarter of 2023 because it takes long — it takes cycle time to have all those wafer out."

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TSMC N3 Information

(Image credit: TSMC)
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TSMC N3 Information

(Image credit: TSMC)

Last quarter TSMC admitted that its N3 node HVM was about four months behind the cycle that it had with its N7 and N5 fabrication process. In both cases the company began HVM using its then leading-edge nodes around April ~ May 2021, to ship the first commercial batch of SoCs to its alpha customer, Apple in time for a new iPhone introduction in September. As it turns out, either the N3 cycle has slipped further, or TSMC's estimate was very conservative, but it looks like the new technology enters HVM in the back half of Q3 rather than in early Q3, as some thought. 

N3E Extends N3

Another interesting thing that TSMC revealed is that its second generation N3 technology will continue to use FinFET transistors, but will have numerous advances. Specifically, TSMC is talking about an improved process window, which essentially means a wider choice of manufacturing parameters to achieve decent yields along with performance enhancements and lower power. 

"We also introduced N3E as an extension of our N3 family," said Wei. "N3E will feature improved manufacturing process window with better performance, power and yield. Volume production of N3E is scheduled for 1 year after N3."

TSMC rarely talks about yield extensions for nodes that are about a year away. So if it addresses N3 yields now, it means that N3E features ways to improve yields beyond traditional methods like continuous process improvement (CPI) that increases yields and lowers performance variations through the means of statistical process control (SPC). 

The introduction of N3E in late 2023 ~ early 2024 means that the company's gate all around field-effect transistor (GAAFET) based N2 technology is not going to arrive until 2025, which is hardly a big deal since we are four years away and do not know all capabilities of N3, N3E, and possible other variations of the technology that is expected to become another long node for TSMC.