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Core Overview

The Mother of All CPU Charts 2005/2006

The hologram found on the original package of an AMD 3800+ CPU.

This seal guarantees that the box is unopened.

This overview shows the cores that are available in the market today, and how they differ from one another.

Codename Instruction Set Cache Size Process
Venice MMX, 3D-Now!, SSE, SSE2, SSE3 512 kB 90 nm
San Diego MMX, 3D-Now!, SSE, SSE2, SSE3 1024 kB 90 nm
Toledo MMX, 3D-Now!, SSE, SSE2, SSE3 1024 kB x 2 90 nm
Manchester MMX, 3D-Now!, SSE, SSE2, SSE3 512 kB x 2 90 nm
Winchester MMX, 3D-Now!, SSE, SSE2 512 kB 90 nm
Newcastle MMX, 3D-Now!, SSE, SSE2 512 kB 130 nm
Clawhammer-512 MMX, 3D-Now!, SSE, SSE2 512 kB 130 nm
Clawhammer MMX, 3D-Now!, SSE, SSE2 1024 kB 130 nm

First up was the Clawhammer (CG) core, which was carried over from Socket 940. It formed the basis for the FX-53 and FX-55 chips, and contained 1 MB of L2 cache. The last CPU to use this core was the Athlon 64 4000+.

The comparison between the FX-53 and the 4000+ always seemed a bit strange. While the two CPUs are completely identical with regard to their specifications, the FX version commanded a 15% price premium. The only difference is that the multiplier can be freely adjusted on the FX, while that of the standard A64 version can only be decreased. This applies to all Socket 939 CPUs.

Probably in an effort to increase chip yield, and also to be able to offer cheaper CPUs, AMD also released Athlon 64s with the model numbers 3400+ and 3500+, which came with half the cache deactivated. This attribute resulted in the name Clawhammer-512 (C0). Aside from the reduced cache size, the C0 stepping of the Clawhammer-512 core was still based on the first FX-51 of the socket 940 platform.

A new core with a newer stepping, the Newcastle (CG), brought improved memory compatibility to the table. This core was designed with 512 kB L2 cache from the start and was only used in the Athlon 64 3000+, 3200+, 3500+, and 3800+.

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