Synopsys adds generative AI for chip development with Synopsys.ai Copilot design software

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Synopsys
(Image credit: Synopsys)

Synopsys was among the first companies to integrate general AI capabilities into its electronic design automation (EDA) suite in 2021– 2024, and by now hundreds, or even thousands of chips, have been designed using AI-enhanced tools. This week, Synopsys introduced a broad upgrade to its semiconductor design platform by embedding generative AI capabilities across its EDA offerings with the aim of shortening development cycles, improving engineer productivity, and enabling complex designs by understaffed teams.

Synopsys already has an EDA toolset capable of covering every stage of chip development, including IP verification (VSO.ai), analog verification (ASO.ai), RTL synthesis, floor planning, place and route (DSO.ai), 3D integration (3DSO.ai), and final functional verification (TSO.ai). The company also has data analytics tools Design.da, Fab.da, and Silicon.da.

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Anton Shilov
Contributing Writer

Anton Shilov is a contributing writer at Tom’s Hardware. Over the past couple of decades, he has covered everything from CPUs and GPUs to supercomputers and from modern process technologies and latest fab tools to high-tech industry trends.