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Intel Architecture Day 2020: Everything You Need to Know

Intel Architecture Day 2020
(Image credit: Intel)

Due to the overwhelming amount of information and incredibly short amount of time to parse it, we broke our coverage into a series of articles, with more to come. This article serves as the hub for our coverage, and our articles are linked and listed with a brief synopsis of each relevant announcement below: 

Intel's Tiger Lake Roars to Life: Willow Cove Cores, Xe Graphics, Support for LPDDR5: The Tiger Lake processors that come with Willow Cove cores and a high-powered Xe LP Graphics engine. 

Intel Drops Xe LP Graphics Specs: Tiger Lake GPU Has 2x Speeds: These graphics promise a doubling of performance over the chipmaker's previous-gen integrated graphics. These integrated GPUs come to market later this year onboard the Tiger Lake processors with the 10nm SuperFin technology.

Intel Xe HPG Gaming GPU: Taking on AMD and Nvidia: Intel's first discrete graphics card for the enthusiast desktop PC market will arrive in 2021. Intel revealed that it won't make these chips, instead contracting them out to an outside fab. 

Intel's Path Forward: 10nm SuperFin Technology, Advanced Packaging Roadmap: Intel calls 10nm SuperFin its largest single intra-node performance increase in its history. We also cover Intel's advanced packaging technologies that it will lean on as a contingency plan as it integrates different process nodes, some from other foundries, into its products. 

Intel Dishes on Alder Lake-S: First x86 Hybrid CPU for Desktops: these new chips are akin to ARM's big.LITTLE concept of clusters of big, fast cores working in tandem with smaller, more efficient cores. Alder Lake-S marks the beginning of the x86 hybrid era for the desktop PC, and Intel's Client 2.0 initiative, which we also cover in this article, signals that the company sees this type of architecture as a long-term path forward. 

Intel displayed its Xe HP and Xe HPC GPUs: Packing a Whopping 40+ TFLOPS: Intel Xe HP is the cornerstone of the company's data center GPU ambitions, with up to 41 TFLOPS of compute for the 4-tile variant.

If there's one thing Intel needs now, it's a coherent message about its plans for the future.

Intel's recent announcement of a delay to its 7nm node sent shockwaves through the tech industry as, yet again, the industry's dominant chipmaker grapples with its inability to move to a smaller, denser process node. Even more shocking, the company admitted that it might turn to outside foundries to manufacture some of its most complex logic devices, potentially upsetting its long reign as one of the last remaining chip-making IDMs with leading-edge process technology. That's not to mention that Intel is the last leading-edge producer of chips on US soil.  

The fallout from Intel CEO Bob Swan's revelation sent the company's valuations into a tailspin as it shed billions of dollars in market cap in a matter of hours, partially fueled by a sense that Intel didn't have specific answers to the pointed questions being thrown its direction. Shortly thereafter, a seemingly-hasty reorganization split its primary design group into five entities as Murthy Renduchintala, the company's chief engineering officer, headed for what appears to be an unplanned departure. 

After hours of video briefings, filtering through hundreds of slides and other materials, and asking plenty of questions, it's pretty easy to boil down the overriding message from Intel at its Architecture Day 2020:

Intel has a plan. 

Whether that plan will work will be a hotly debated topic, but even though there are plenty of questions left unanswered, Intel's event delivered a sorely needed assurance that the chipmaker has a series of plans that could help it remain competitive in spite of its looming 7nm process delay.

In the past, Intel's similar problems with its 10nm node had highlighted the need for internal changes to its design methodology to lessen the impact of any further disruptions to its process roadmap. In fact, the company developed much of its plan to deal with just these types of problems two years ago. We covered those approaches during Intel's previous Architecture Day, which focused heavily on the contingency plans the company was developing for just such a disastrous occasion. 

That previous event was helmed by the dynamic duo brought in by Murthy Renduchintala to help solve the chipmaker's problems: Raja Koduri and Jim Keller. 

Jim Keller resigned two months ago, leaving Koduri as the remaining chip wizard behind the six-pillar plan that Intel crafted two years ago. Koduri spent much of Architecture Day 2020 repeating many of the plans the company had already made to enable a faster response to process node delays, and also made a few new announcements about the company's critical underpinning technologies. 

  • Giroro
    Intel has made it pretty clear that none of their 'plans' really mean that much right now, since they are consistently missing milestones.

    So the real question is, how many years until they actually manage to bring any of this to market?
    Reply
  • vinay2070
    Giroro said:
    Intel has made it pretty clear that none of their 'plans' really mean that much right now, since they are consistently missing milestones.

    So the real question is, how many years until they actually manage to bring any of this to market?
    All thier delays are due to fab issues. I believe that the Xe HPG should come out on time as they have reserved enough capacity on the 6/7nm TSMC. They have also reserved wafers on 5nm god knows what that is for. But I doubt TSMC will ever have space for all of intel CPUs unless Intel asks TSMC to build a bigger foundry for their next node.
    Reply