A Weibo user has shared two alleged Intel PowerPoint slides pointing to the chipmaker's 10nm rollout for 2020. As with any leak, however, approach this information with skepticism as it hasn't been confirmed by Intel.
The first slide's title roughly translates to "Moore's Law: Return to a Two-Year Cadence" and details the estimated timeline for Intel's upcoming 10nm and 7nm nodes. This is the same chart that Intel shared at its 2019 investor meeting with some additional annotations that weren't previously present.
For the 10nm portfolio, the slide claims improved yields, significant increase in production capacity and a series of 10nm products launching in 2020. As for the 7nm lineup, the leak says the leading product will land in 2021, while the complete product portfolio can be expected in 2022. The information also suggests performance enhancements every year.
The second slide allegedly contains all the 10nm product launches that we could be see from Intel throughout this year.
Alder Lake is the codename for Intel's upcoming 10nm desktop CPUs that are rumored to adopt the hybrid architecture like Lakefield. Rumors point to a 16-core configuration comprised of eight big cores and eight small cores. For reference, Lakefield utilizes a combination of Sunny Cove and Tremont cores. The current possibilities for Alder Lake include Willow Cove or Golden Cove for the more powerful cores and Tremont or Gracemont for the low-power cores. The exact design is unknown at this point.
Tiger Lake will reportedly replace the existing Ice Lake family. The new 10nm processors look like they'll fuse Intel's Willow Cove cores with its Gen12 Xe graphics engine. Another improvement worth mentioning is that Tiger Lake chips are expected to come with a larger amount of L3 cache, up to 50% more than Ice Lake. Tiger Lake could come out this summer.
Processors won't be the only thing on Intel's menu either. The DG1 discrete graphics card, which is based on the Xe graphics architecture, is seemingly scheduled to arrive this year. A tweet from Raja Koduri, Intel’s chief architect, hinted to a June 2020 release. The DG1 seems to be packing up to 96 Execution Units (EUs). At eight shaders per EU, the DG1 would have up to 768 shaders at its disposal. For context, Tiger Lake's Gen12 iGPU also features 96 EUs; however, the DG1 should be significantly faster.
On the server side, Intel will seemingly refresh its Xeon offerings with 10nm Ice Lake-SP chips. A previous leaked slide showed Ice Lake-SP maxing out at 38 cores and supporting up to 64 PCIe 4.0 lanes and eight memory channels. Of course, Ice Lake-SP will command a new CPU socket, which in this case is LGA4189.
Lastly, the slides also list Snow Ridge, an SoC that Intel designed specifically for 5G base stations. However, Intel already launched Snow Ridge in the first quarter of this year.
The hyperthreaded server cores share avx512 units between threads while this version chip would not share avx512 units.
There are issues with sharing avx512 units between threads that result in programming recommendations to disable hyperthreading for hpc processing, so this is potentially an even bigger win for hpc. Double the avx512 execution units and not having to disable hyperthreading.
Sounds like a good trade-off for a core that is probably less than half the size of the big cores. ( about one-fourth the size in Lakefield).
(i) U series processors’ frequencies have always been considerably lower than desktop ones. Typically around 500MHz lower (+/-200MHz) with the difference often exceeding 1GHz when you mildly OC your desktop cpu (‘stock volts’, air cooling).
(ii) Historically whenever a new generation was introduced, the single core speed of the mainstream flagship in the mobile platform was between 3.0GHz-3.5GHz. If the Icelake U cpus came just after the (already mature) 14nm+ Kabylake U cpus we would actually be talking about the incredible jump in single core frequency, going from 3.5GHz of the i7 7500U to the 3.9GHz of the i7 1065G7. We would be talking about how great the 10nm process is compared to the 14nm one.
(iii) Just because Intel spent more time on the 14nm keep optimising for frequency, it doesn’t mean there is something wrong on the cycle of the 10nm process in terms of the achievable frequency. Frequency improvements will be achieved as the process matures further, the same way it happened with the 22nm and the various iterations of the 14nm processes in the past. I doubt that the yield problems we have heard about the 10nm process are frequency-related problems. Intel can probably already produce Icelake desktop cpus with pretty decent clocks (like 4.5Ghz or so). Instead the yield problems seem to have been “misprinting” problems. In other words, if they went ahead to produce larger dies of Icelake cpus (like 8core or 10core ones) they would be throwing a lot of them away because they are straight-out faulty, not because they can’t hit a certain high frequency.
(i) The IPC gains of Willow Cove compared to Skylake should be massive - like around 30%. A 10% loss on frequency is therefore more than compensated.
IPC increase is tricky for another reason too. You see, one way that manufactures use to increase IPC is by making the cores wider/larger, so that they increase parallelism within a core. This benefits applications such as Cinema4D that would also scale through parallel processing across more cores, but it does nothing for workloads that can’t scale more with parallel processing because of algorithmic dependencies or latencies. For the latter you need a more computationally efficient architecture, a more optimised mapping of the algorithms to the core logic and a topology that allows for smaller inter-core latencies. For the most part AMD’s IPC uplift stems from in-core parallelism as well as attempts to limit the originally large inter-die or inter-CCX latencies. The first is easy and the second is just fixing an originally flawed design. So no, in this context of IPC vs frequency, for a more apples to apples comparison, I wouldn’t compare Intel to AMD. I would compare Intel (newer architecture) Vs Intel (older architecture). And I would do the same for AMD.
That said, any desktop 10 nm CPU will probably use their 10 nm++ process node (with Ice Lake using their 10 nm+ version).
Uh, that is yield.
And the Comet Lake mobile CPUs are also 4-core, so the yield explanation doesn't hold water for explaining why they needed to revert to 14 nm for their current mobile performance models.
I'll believe it when I see it.
Nah, I don't buy it. I just don't see the value of Big.Little, in the desktop platform. It'd make more sense to replace the 8 little cores with 2 more big cores. You can save enough power simply by cutting back on clock speeds, or even powering off cache blocks, if needed.